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Articles tagged with #llvm-codegen
This is some of my notes for LLVM's ISelDAGToDAG instruction selector and how SelectionDAG patterns are matched and lowered to machine instructions. Purpose What: ISelDAGToDAG translates a legalized SelectionDAG into target-specific machine instruct...
This article is a follow-up to my previous post LLVM Instruction Selection: SelectionDAG Building, where we explored how SelectionDAGs are constructed from LLVM IR. In this post, we explore the next phase: legalization*, which ensures the DAG conform...
LLVM's instruction selection (ISel) is a key stage in the LLVM backend that translates high-level LLVM IR into target-specific machine instructions. This post focuses on the frontend of instruction selection—the phase that builds the SelectionDAG fro...